๐Ÿ‘คluu๐Ÿ•‘9y๐Ÿ”ผ146๐Ÿ—จ๏ธ40

(Replying to PARENT post)

I wonder if this was released due to Xen's recent x86 instruction emulation bugs.

http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2016-9932

http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2016-9383

๐Ÿ‘คmonocasa๐Ÿ•‘9y๐Ÿ”ผ0๐Ÿ—จ๏ธ0

(Replying to PARENT post)

Seems like this would make one able to write the object-code codegen phase of a compiler at a rather higher level (at least if you're only targeting x86, or are willing to write similar libraries for your other arch targets.)

Or, to put it another way: looks like a good library for adding "just a bit of JIT" to an interpreter, without going full LLVM.

๐Ÿ‘คderefr๐Ÿ•‘9y๐Ÿ”ผ0๐Ÿ—จ๏ธ0

(Replying to PARENT post)

"As new instructions are made public"? WTF does that mean? We're not even allowed to know the full instruction set of an X86 CPU?
๐Ÿ‘คdreamcompiler๐Ÿ•‘9y๐Ÿ”ผ0๐Ÿ—จ๏ธ0

(Replying to PARENT post)

This is awesome. I thought it's closed source. I wonder how close it is to the hardware.

Can I assume that whatever is parsed by XED is going to be parsed in the same way by real CPU's?

๐Ÿ‘คmajke๐Ÿ•‘9y๐Ÿ”ผ0๐Ÿ—จ๏ธ0

(Replying to PARENT post)

How does this compare to ARM's VIXL?

[1] https://github.com/armvixl/vixl

๐Ÿ‘คstruct๐Ÿ•‘9y๐Ÿ”ผ0๐Ÿ—จ๏ธ0

(Replying to PARENT post)

About time they open sourced it. Funny how it is Python according to github :)
๐Ÿ‘คthecompilr๐Ÿ•‘9y๐Ÿ”ผ0๐Ÿ—จ๏ธ0

(Replying to PARENT post)

Looks handy. Thanks for posting, Dan.
๐Ÿ‘คjonjohn84๐Ÿ•‘9y๐Ÿ”ผ0๐Ÿ—จ๏ธ0

(Replying to PARENT post)

Something that is universal is not remarkable. People will not make as much use of an unremarkable opportunity as they will of a remarkable one.
๐Ÿ‘คdsfyu404ed๐Ÿ•‘9y๐Ÿ”ผ0๐Ÿ—จ๏ธ0