(Replying to PARENT post)
> A softcore is a CPU to run on an FPGA.
It's also an unwise search term on the web. Ask me how I know!
The big thing that complicates figuring out a transistor count for a soft CPU core is that FPGAs have hardware multipliers, which would be pretty big if you had to build them yourself.
👤robinsonb5🕑2y🔼0🗨️0
(Replying to PARENT post)
>A softcore is a CPU to run on an FPGA.
Technically it's a core that's supplied as RTL (code). There's nothing stopping you using it in custom silicon instead of on an FPGA. Whereas a "hard IP" core is already compiled down to a specific technology and can only be used there. It's possible for a hard macro to be for an FPGA, but it would be for a specific product line. A "hard macro" for custom silicon would be specific to a particular fab process.
👤ajb🕑2y🔼0🗨️0
(Replying to PARENT post)
Times 10-20 is a good way to get to gates from LUT4 (and some number of flip-flops). In turn, multiply by 4 to get transistors.
Of course, this is all very approximate.
👤mlyle🕑2y🔼0🗨️0
(Replying to PARENT post)
> Microwatt fits in a Lattice ECP5 FPGA with 85,000 LUTs
There goes "tiny"...
👤RetroTechie🕑2y🔼0🗨️0
(Replying to PARENT post)
Microwatt fits in a Lattice ECP5 FPGA with 85,000 LUTs (plus some block ram). Not sure how you'd get to transistors from that, wild guess times by 15 maybe? (But then the FPGA also has other special hardware blocks intended for interfacing with DDR RAM and other things, so those would be more as well).
You can see how the Power instruction decode is implemented https://github.com/antonblanchard/microwatt/blob/master/deco...