rbanffy

โœจย Seasoned software developer, proficient in Python, Java. Less proficient in Ruby and Lisp. A bit rusty in C and C++. Learning Erlang very slowly. Also a computer collector and restorer, lover of 8-bit computers, mainframes and interesting Unix workstations.

email: username at that google mail thing

http://about.me/rbanffy

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[ my public key: https://keybase.io/rbanffy; my proof: https://keybase.io/rbanffy/sigs/HtF1uAf_RNpwIkNP1-YGWP_-3doWV6S5Cc1KywXeLYo ]

๐Ÿ“… Joined in 2008

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15 latest posts

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(Replying to PARENT post)

You could have some breathing room by scaling up to a bigger box (AFAIK, x86 tops out at 920 cores per memory image)
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(Replying to PARENT post)

It really depends on what they are doing. At this stage, I'd suspect it needs some major rearchitecture, but they accumulated so much tech debt it's difficult to say what next steps could be. As was pointed out by others, starting by introducing some strong governance practices would be a good start.
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(Replying to PARENT post)

The biggest x86 machine I found tops out at 960 cores, but I'm not sure what exactly they need, if having more cores would solve their problems or would only make some other pipe burst.

To figure that out, we'd need to look deep into what's happening in the machine, down to counting cache misses, memory bandwidth usage (per channel), QPI link usage (because NUMA), and, maybe, even go down to the usage stats of the CPU execution units.

When they mention a lot of what was stored procedures has been moved to external web services, I get concerned they replaced memory and CPU occupancy with it waiting for network IO.

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(Replying to PARENT post)

That's a good point. I guess they shot themselves in the foot big time.

It might run on ARM. IIRC, Ampere has some large ones with lots of memory bandwidth. Maybe CXL memory can also help mitigating any disk IO.

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(Replying to PARENT post)

It's hard to give significant advice with this little information - how much time the CPUs spend waiting for the memory, how many cache misses are happening, how many core execution units are doing something at any given time, etc.

HPE has single-image machines that can have up to 16 4th gen Xeons, which gives a top limit of 960 cores. IBM has POWER10 boxes that go up to 240 cores (but they are POWER 10 cores that can do, IIRC, up to 8 threads per core (increasing cache misses, but reducing unused execution units).

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(Replying to PARENT post)

I believe this analises the N64 binary looking for patterns and replacing them with calls to PC-native APIs supporting newer hardware features. A lot of the game is setting up 3D geometries, assigning them textures and letting the N64 GPU do its magic - and all that can be done with more modern hardware.
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